Aerospace
NASA’s New AI Space Chip Could Transform Deep Space Missions

Humans are curious by nature, and that very curiosity has led us to space and beyond. Every day, humanity discovers something new and invents advanced technology, which has allowed us to explore distant regions of outer space.
But as missions venture farther from Earth toward the Moon, Mars, and even more distant and deeper into the cosmos, bigger rockets or longer missions are just not enough. What we need is smarter technology to reduce reliance on constant human oversight, which is becoming increasingly impractical.
Vast distances, extreme environments, and communication delays are pushing agencies like NASA to develop autonomous systems capable of making real-time decisions in space.
Instead of having a probe in space sending data back for human engineers and scientists to study and then provide instructions for the probe, the focus is now on having the spacecraft itself do all the work.
Advances in artificial intelligence (AI), radiation-hardened computing, onboard analytics, and edge processing are now allowing the development of spacecraft that can think for themselves. Such a capability is seen as critical for the next generation of space exploration.
According to NASA, more capable processes are necessary for autonomous spacecraft and supporting astronauts during their missions to other planets.
This is particularly important as the agency’s Artemis program prepares to return humans to the Moon in the next few years. Already, NASA’s Artemis II mission has had a successful crewed lunar flyby this year.
“Artemis II is the start of something bigger than any one mission. It marks our return to the Moon, not just to visit, but to eventually stay on our Moon Base, and lays the foundation for the next giant leaps ahead.”
– NASA Administrator Jared Isaacman
As the agency moves to prove that it can not only reach the Moon but also sustain humans there and eventually Mars, the computing demands are growing significantly.
For crewed habitats to detect faults in real time, rovers to navigate terrain autonomously, and landers to process tremendous amounts of sensor data in a short time, we need more powerful and capable processors than those currently flying in space.
And that’s exactly what’s being built. NASA’s new next-gen space chip1 can easily fit in your palm and is delivering a breakthrough in computational speed. This High Performance Spaceflight Computing (HPSC) initiative is expected to enable spacecraft to operate far more independently in deep space.
NASA’s HSPC Initiative to Redefine Future Space Missions
For decades, NASA has been advancing computer processors on board spacecraft. These processors are responsible for coordinating and executing the functions necessary to support mission success.
Space computing first emerged more than half a century ago with the pioneering Apollo Guidance Computers (AGCs), which performed navigation, steering, and control computations during the agency’s Moon missions.
But the thing is, when moving outside Earth’s protective magnetic field, we face a universe full of radiation, which is energy emitted as rays, electromagnetic waves, and/or particles. The radiation of space is different from what we experience on Earth. It is made up of galactic cosmic rays, particles trapped in the Earth’s magnetic field, and particles shot into space during solar flares.
Space radiation negatively affects both human crews and mechanical instruments. Besides causing long-term damage to electronic components, it also triggers errors that disrupt computing, creating a need for radiation-hardened processors, which are expensive and slow to develop.
While radiation-hardened processors have enabled many of NASA’s greatest achievements, those currently in use were developed almost three decades ago and lack the performance required for today’s more advanced, complex, and lengthy missions.
Moreover, missions beyond Earth orbit require onboard computing resources because communication with Earth introduces a time delay. This communication latency necessitates that space activities be performed autonomously and in real time onboard, which involves running a range of computational workloads, including AI and machine learning, advanced autonomy, image and signal processing, object detection and classification, and data flow management.
To make these workloads possible, we need advances in onboard computing technology. This led to the development of a new solution: High-Performance Spaceflight Computing (HPSC), a next-generation system-on-chip that is over 100 times more capable than current space processors.
| Space Computing Layer | Legacy Space Systems | NASA’s HPSC Architecture | Long-Term Implications |
|---|---|---|---|
| Processing Capability | Spacecraft relied on decades-old radiation-hardened processors with limited compute power. | HPSC delivers up to 100–500x greater onboard computing performance. | Future missions gain real-time autonomous decision-making capabilities. |
| Mission Autonomy | Spacecraft depended heavily on instructions transmitted from Earth. | AI-enabled onboard processing allows spacecraft to react independently in space. | Deep-space missions become less constrained by communication delays. |
| System Architecture | Multiple specialized components increased size, power use, and complexity. | The SoC integrates CPUs, networking, memory, and I/O into one compact processor. | Smaller, lighter, and more efficient spacecraft systems become possible. |
| Environmental Resilience | Radiation exposure frequently disrupted onboard electronics and operations. | HPSC is radiation-hardened and designed for thermal, vacuum, and shock endurance. | Long-duration missions to the Moon, Mars, and beyond become more reliable. |
| Scientific Data Processing | Large volumes of sensor data required delayed analysis on Earth. | Onboard analytics and edge processing enable real-time filtering and interpretation. | Spacecraft can process massive datasets autonomously during missions. |
| Commercial Spillover | Space-grade processors had limited applications outside aerospace missions. | Microchip plans to adapt HPSC technology for AI, aviation, automotive, and energy sectors. | NASA-developed computing could influence multiple terrestrial industries. |
“Building on the legacy of previous space processors, this new multicore system is fault-tolerant, flexible, and extremely high-performing,” said Eugene Schwanbeck, program element manager in the agency’s Space Technology Mission Directorate’s Game Changing Development (GCD) program at its Langley Research Center in Virginia. “NASA’s commitment to advancing spaceflight computing is a triumph of technical achievement and collaboration.”
At the center of the initiative is a radiation-hardened processor that is built for deep-space and long-duration missions to the Moon, Mars, and beyond.
It can operate in the harsh conditions of space and complete tasks independently in real-time. It is also customized for the aerospace sector, providing fault tolerance and cybersecurity for LEOs (low Earth orbit satellites).
The new system combines computing and networking into a single device, reducing both cost and power consumption.
It uses advanced Ethernet to group multiple chips or connect several sensors, enabling HPSC to process vast amounts of data onboard and autonomously make real-time decisions, such as filtering images or piloting rovers at high speeds. Meanwhile, its scalable architecture enables optimization of energy efficiency for critical operations by powering down unused functions.
Meanwhile, the safety and reliability of the complex operations are ensured by an integrated security controller and continuous monitoring of system health.
HPSC technology is a joint effort by academic and industry partners. The project is managed by the GCD program, which, along with Jet Propulsion Laboratory (JPL), has been leading the initiative by developing mission requirements, funding studies, and managing the project life cycle to delivery.
For the project, NASA JPL selected Microchip (MCHP ) as its commercial partner in 2022, with the company funding its own research and development of the processor.
“This cutting-edge spaceflight processor will have a tremendous impact on our future space missions and even technologies here on Earth,” said Niki Werkheiser, director of technology maturation within the Space Technology Mission Directorate at the time. “This effort will amplify existing spacecraft capabilities and enable new ones and could ultimately be used by virtually every future space mission, all benefiting from more capable flight computing.”
In 2024, the project passed the Critical Design Review (CDR). Last year, the final design was sent for fabrication, and the first HPSC processor was successfully manufactured.
NASA’s Next-Gen Space Chip Enters Real-World Testing

HSPC, the brain of the spacecraft, has now officially undergone testing this year, and early results show remarkable performance.
The space computer chip is designed to be small enough to fit in the palm of your hand while dramatically increasing the intelligence and performance of future spacecraft. The new radiation-hardened processor is built to deliver up to 100 times the computing power of existing spaceflight computers.
Engineers at JPL are running a variety of tests that simulate the harsh environment of space.
“We are putting these new chips through the wringer by carrying out radiation, thermal, and shock tests while also evaluating their performance through a rigorous functional test campaign.”
– Jim Butler, HPSC project manager at JPL
To be eligible for spaceflight, the processor must withstand launch vibrations, dramatic temperature swings, the vacuum of space, and intense electromagnetic radiation that can damage electronics.
Subatomic particles that travel at velocities close to the speed of light and are generated by the Sun and deep space can also cause errors that force spacecraft to temporarily shut down nonessential operations. The system doesn’t exit safe mode until the issue is resolved by the ground engineers.
Furthermore, NASA is testing just how the processor handles the challenges of planetary landings, such as hazardous surface terrain and extreme or a lack of atmospheric densities.
“To simulate real-world performance, we are using high-fidelity landing scenarios from real NASA missions that would typically require power-intensive hardware to process huge volumes of landing-sensor data,” said Butler. “This is an exciting time for us to be working on hardware that will enable NASA’s next giant leaps.”
The agency began testing the chip at JPL in February this year, with the first email having a subject line “Hello Universe,” a nod to computer programming history. With this small phrase, the team got confirmation that the technology works.
The trial is expected to last several months, but early results have been very positive.
For starters, the processor, according to NASA, is working as intended. Moreover, its performance has been about 500 times greater than that of currently in use chips.
The device is a system-on-a-chip (SoC), an integrated circuit that combines all of a computer’s essential components into a single compact unit. The processor includes memory, central processing units (CPUs), input/output interfaces, and advanced networking systems. Because they are compact, energy-efficient, and cost-effective at scale, SoCs are widely used in smartphones, automotive systems, and IoT.
But the version developed by NASA is designed to last for years in deep space. The system has to travel for millions, potentially even billions of miles from Earth and survive without any maintenance or repairs.
Developed jointly by JPL and Microchip Technology, the chips have already been shared with defense and commercial aerospace early-access partners.
It has yet to be certified for space, though, and once it is authorized, NASA will integrate the processor into a wide range of missions, including planetary rovers, Earth orbiters, and deep-space probes.
The chip is expected to play a key role in the future of autonomous spacecraft. Having AI onboard, the spacecraft would be able to respond to unexpected situations in real time, eliminating the need for human control, which becomes impractical at such vast distances that create communication delays.
The technology would also help make the processing, storage, and transmission of massive amounts of scientific data more efficient. It may eventually even support crewed missions to the Moon and Mars, as per NASA.
Furthermore, the technology has benefits on Earth as well, unlike traditional space-specific chips, with Microchip planning to adapt the chip for consumer electronics, automotive manufacturing, the aviation sector, and other industries. Its potential applications include medical equipment, energy grids, AI, drones, data transmission, and communication services.
This design adaptation for terrestrial industries suggests that the radiation-hardened chip may have a commercial life well beyond the missions that drove its creation.
The use of a common technology base on both Earth and in space, according to the agency, will enable HPSC to strengthen domestic industrial capabilities while reducing costs and risks for government and commercial users.
Investing in Deep Space Tech: Microchip Technology (MCHP)
The Arizona-based Microchip Technology Inc. stands out in the field as NASA’s commercial partner in developing the HPSC processor, which is currently undergoing testing.
The next-generation space-qualified compute processor platform, Babak Samimi, corporate vice president for Communications business unit, noted at the time, “will deliver comprehensive Ethernet networking, advanced artificial intelligence/machine learning processing and connectivity support while offering unprecedented performance gain, fault-tolerance, and security architecture at low power consumption.”
The company boasts a strong footprint in aerospace-grade electronics and embedded systems, positioning it strategically for the growing space computing market. Also, it can easily adapt these technologies for broader industries like automotive systems, robotics, and industrial AI.
Microchip Technology is a provider of smart, connected, and secure embedded control solutions, serving customers across consumer, computing, communications, automotive, aerospace and defense, and industrial markets.
With a market cap of $50 billion, the shares of Microchip Technology Incorporated (Nasdaq: MCHP) are trading at $92.70, up 46.20% YTD and 53.22% in the past year. It has an EPS (TTM) of 0.21 and a P/E (TTM) of 437.21. The dividend yield paid is 1.97%.
(MCHP )
The company’s recovering revenue also paints a positive outlook for Microchip. For the quarter ended March 31, 2026, the company reported a 35.1% YoY increase in net sales to $1.311 billion, which was up 10.6% sequentially and higher than the guidance ($1.260 billion) provided by Microchip.
These results, CEO and President Steve Sanghi said, “significantly exceeded our expectations.” The key lesson from the last cycle, he noted, was the importance of disciplined inventory and working capital management, and that’s how they are operating the business.
On a GAAP basis, the leading provider of semiconductors reported gross profit of 61%, operating income of $217.4 million, net income of $116.4 million, and EPS of $0.21 per diluted share. On a Non-GAAP basis, its gross profit was 61.6%, operating income was $400.9 million, net income was $327.3 million, and EPS was $0.57 per diluted share.
“We are seeing strong customer engagement and expanding design activity in data center and AI applications, driven by the breadth and performance of our high‑speed connectivity and compute portfolio.”
– Rich Simoncic, Microchip’s COO
For fiscal year 2026, Microchip’s net sales came in at $4.713 billion, up 7.1% over the prior year, while $984 million was returned to shareholders through dividends. The company reported gross profit of 57.7% on a GAAP basis and 58.5% on a non-GAAP basis for the entire year, while its EPS was $0.22 and EPS of $1.64 per diluted share, respectively.
“We ended the fiscal year with strong momentum, representing meaningful progress from the challenging conditions we were navigating just a few quarters ago,” said Sanghi. “As demand conditions have improved and customer inventory has normalized, we are seeing increasing momentum across our product lines, improving booking and sell‑through trends, strong expedite activity, and meaningful operating leverage, reflecting disciplined execution against our nine‑point recovery plan.”
As the company moves into “seasonally stronger” quarters, it expects net sales for the June quarter to be in the range of $1.442 billion to $1.469 billion.
Latest Microchip Technology (MCHP) Developments
Conclusion
With its next-gen space processor initiative, engineers at JPL have taken a giant leap toward miniature chips that will advance deep space exploration. The spacecraft isn’t just a passive instrument that waits for instructions anymore, but rather an active and intelligent participant capable of observation, judgment, and response.
As NASA’s ambitions grow, with plans for sustained lunar presence, crewed Mars missions, and deep-space science platforms venturing to the outer solar system, the computing architecture at the heart of each spacecraft becomes the deciding factor for what’s possible.
With a processor that delivers 500 times the capability of its predecessors, the agency aims not only to make existing missions faster but also to make entirely new kinds of missions feasible.
While there are still constraints to navigate and full spaceflight certification will take time, the agency and Microchip have made a good start, pointing to a future in which spacecraft will operate with unprecedented independence, millions of miles from Earth.
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References
1. Jet Propulsion Laboratory. (2026, May 12). Hello universe: NASA’s next-gen space processor undergoes testing. NASA. https://www.jpl.nasa.gov/news/hello-universe-nasas-next-gen-space-processor-undergoes-testing/












